VLSI Design

Features VLSI Design

This app is a complete free handbook of VLSI Design which covers important topics, notes, materials on the course.it has more than 90 topics of VLSI Design in detail.
These topics are divided in 5 units.It is part of electronics & communications engineering education which brings important topics, notes, news & blog on the subject.
Download the App as quick reference guide & eBook on this electronics & communications engineering subject.The App is designed for quick learning, revisions, references at the time of exams and interviews.
This app cover most of related topics and Detailed explanation with all the basics topics.
Some of topics Covered in this engineering eBook are:1.
Semiconductor memories :Introduction and types2.
Read Only Memory (ROM)3.
Three transistor DRAM cell4.
One transistor DRAM Cell5.
Flash memory6.
Low - Power CMOS Logic Circuits: Introduction7.
Design of CMOS inverters8.
MOS Inverters : introduction to switching characteristics9.
Scan-Based Techniques10.
Built-In Self Test (BIST) Techniques11.
Historical prospective of VLSI Design : Moores Law12.
Classification of CMOS digital circuit types13.
A Circuit Design Example14.
VLSI Design methodologies15.
VLSI Design flow16.
Design Hierarchy17.
Concept of regularity, modularity and locality18.
CMOS fabrication19.
Fabrication Process Flow : Basic Steps20.
Fabrication of the nMOS transistor21.
CMOS fabrication : p-well process22.
CMOS fabrication : n-well process23.
CMOS fabrication : twin tub process24.
Stick diagrams and mask layout design25.
MOS transistor : physical structure26.
The MOS System under External Bias27.
Structure and operation of MOSFET28.
The threshold voltage29.
Current voltage characteristics of MOSFET30.
Mosfet scaling31.
Effects of scaling32.
Small Geometry Effects33.
MOS Capacitances34.
MOS inverter35.
Voltage transfer characteristics (VTC) of MOS inverter36.
Inverters with n-type MOSFET load37.
Resistive load inverter38.
Design of Depletion-Load Inverters39.
CMOS inverter40.
Delay time definitions41.
Calculation of Delay Times42.
Inverter Design with Delay Constrains : Example43.
Combinational MOS Logic Circuits : introduction44.
MOS Logic Circuits with Depletion nMOS Loads : Two-Input NOR Gate45.
MOS Logic Circuits with Depletion nMOS Loads : Generalized NOR structure with multiple inputs46.
MOS Logic Circuits with Depletion nMOS Loads : Transient analysis of NOR gate47.
MOS Logic Circuits with Depletion nMOS Loads : Two-Input NAND Gate48.
MOS Logic Circuits with Depletion nMOS Loads : Generalized NAND structure with multiple inputs49.
MOS Logic Circuits with Depletion nMOS Loads : Transient analysis of NAND gate50.
CMOS logic circuits : NOR2 (two input NOR ) gate51.
CMOS NAND2 (two input NAND) gate52.
Layout of Simple CMOS Logic Gates53.
Complex Logic Circuits54.
Complex CMOS Logic Gates55.
Layout of Complex CMOS Logic Gates56.
AOI and OAI Gates57.
Pseudo-nMOS Gates58.
CMOS Full-Adder Circuit & carry ripple adder59.
CMOS Transmission Gates (Pass Gates)60.
Complementary Pass-Transistor Logic (CPL)61.
Sequential MOS logic Circuits : Introduction62.
Behavior of Bistable Elements63.
The SR Latch Circuit64.
Clocked SR Latch65.
Clocked JK Latch66.
Master-Slave Flip-Flop67.
CMOS D-Latch and Edge-Triggered Flip-Flop68.
Dynamic Logic Circuits : Introduction69.
Basic Principles of Pass Transistor CircuitsAll topics are not listed because of character limitations.
Each topic is complete with diagrams, equations and other forms of graphical representations for better learning and quick understanding.This app will useful for quick reference.
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